In 1997 1 Teraflop of computing power required 9,298 PII Xeon systems. In 2011 it can be done with one chip.

"Intel says that its MIC architecture benefits from the ability to run existing applications without the need to port the code to a new programming environment."

Knights Corner

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Grant
Darwin NT

Correct me, but isnt something you put in a PCIe slot and capable of 1TF called a HD4850? At least thats what my BOINC says after every start.

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Correct me, but isnt something you put in a PCIe slot and capable of 1TF called a HD4850? At least thats what my BOINC says after every start.

The key difference vaguely mentioned in the article is they are talking double precision. My understanding is that both the nVidia & AMD/ATI Flops shown at Boinc startup are estimates of single precision peak flops, whereas the article also suggests sustained throughput (rather than peak theoretical) as well.

Jason

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"Living by the wisdom of computer science doesn't sound so bad after all. And unlike most advice, it's backed up by proofs." -- Algorithms to live by: The computer science of human decisions.

Ok than maybe the HD5970(2× 464 DP) or HD6990(2× 637,5 DP) is more likely to beat this chip. Or are that also "only" peaks?

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Unlike present GPUs which only have the one processing core, the Knights Corner is (initially) a 50 core device.

I'd be interested to see an article on it's actual architecture- i supsect it's a result of Intels's Larrabee project. Instead of it being used for graphics, they put it towards number crunching instead.

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Grant
Darwin NT

Ok than maybe the HD5970(2× 464 DP) or HD6990(2× 637,5 DP) is more likely to beat this chip. Or are that also "only" peaks?

My understanding of the formula used in all cases is 'Peak theoretical', which can also be called 'Marketing Flops'. Of course whether the article's claims of sustained TeraFlop performance pan out to a similar sortof artificial number remains to be seen... I'd envisage a number of practical problems related to the speed of memory subsystems etc.

Jason.

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"Living by the wisdom of computer science doesn't sound so bad after all. And unlike most advice, it's backed up by proofs." -- Algorithms to live by: The computer science of human decisions.

Have you seen the picture of the Intel-Guy (Dr. Rajeeb Hazra), where he holds the thing? Can you imagine how much power this device will consume? I guess it is 600W+...

Have you seen the picture of the Intel-Guy (Dr. Rajeeb Hazra), where he holds the thing? Can you imagine how much power this device will consume? I guess it is 600W+...

I was thinking either that's a very big Chip, or a very small man, LoL.

22nM tri-gate is supposed to be relatively cool & efficient, will be interesting to see. I also still doubt they would have fit it into the regular desktop 95 or 135 Watt TDP envelope though.

Jason

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"Living by the wisdom of computer science doesn't sound so bad after all. And unlike most advice, it's backed up by proofs." -- Algorithms to live by: The computer science of human decisions.

So is this somthing that we'll be able to put in our PC in a couple years?

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My Computers:
â–ˆ Blue Offline
â–ˆ Green Offline
â–ˆ Red Offline

I have been wanting "co-processors" to stick in my computer for the past 15 years. All I have to say is that "it is about freaking time".

GPU computing is good, but why haven't they made generalized "compute" boards. Where they could strip off all of the video things that you don't need to processing data.

The previous generation of this they showed off was "Knight's Ferry" which had 32 cores and ran 128 threads. IIRC it sucked up around 250-300w. So you would need 2 8 pin PICe connectors for one of those cards. I'm not sure if it was using older 40 or 32nm tech. so the new one might use less power today.

This also seems like what they were doing with the GPU they were making a few years ago. Where they just shoved a bunch of low power x86 cores into a single chip.

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So is this somthing that we'll be able to put in our PC in a couple years?

If you can afford it. It might cost as much as your house when it comes out.

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I wonder if they will release it as a PCIe card? We could stuff these in a machine instead of a bunch of GPU's.

Does it support AVX? :-)

Some stuff from intel.com...

Standard programming models
A key advantage for developers using Intel MIC products is the ability to use standard, existing programming tools and methods. Intel MIC architecture combines many Intel CPU cores onto a single chip. These cores can be programmed using standard C, C++, and FORTRAN source code. The same program source code written for Intel Many Integrated Core products can be compiled and run on a standard Intel Xeon processor. The familiar programming model removes developer training barriers allowing the developer to focus on the problems rather than software engineering.

For example, CERN OpenLab, the European Organization for Nuclear Research, was able to use the Knights Ferry kit to migrate a complex benchmark written in C++ code to the new architecture in just a few days. According to Sverre Jarp, CTO of the CERN open lab, "The familiar hardware programming model allowed us to get the software running much faster than expected."

Creating a many core Intel architecture
The MIC project is the fruit of three research streams: The 80-core Tera-scale research chip program, the single-chip cloud computer initiative, and the Larrabee many-core visual computing project. The result is a fundamentally new architecture that uses the same tools, compilers, and libraries as the Intel Xeon processors. Since Intel processors are used in over 80% of the world’s supercomputers, programmers can continue to work in familiar territory when creating software for the MIC architecture.

Initial MIC products
The first MIC product is codenamed "Knights Corner," and development kits, codenamed "Knights Ferry," are already shipping to select software developers.

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BOINC blog

Also on Rosetta@home number crunching thread Intel unveils 1 teraflop chip with 50-plus cores

And two links from that thread :-

http://seattletimes.nwsource.com/html/technologybrierdudleysblog/2016775145_wow_intel_unveils_1_teraflop_c.html

http://www.xbitlabs.com/news/cpu/display/20111115163857_Intel_Shows_Off_Knights_Corner_MIC_Compute_Accelerator.html

The slides from the presentation give an idea of its low power consumption.
And may be available next year to those with a very fat wallet . . .

Here is another link with pictures.

You'd sweare thats a nvidia reference card they are holding. Apparently the demo ones are based on 40nm chips and yes its a PCIe card.

We'd have to ask Intel if they could make one available for Jason so he can start coding :-)

I wonder what nvidia are going to do to respond? While their cards have great single-precision capabilities, they might try and increase the double-precision on upcoming chips. Not too sure what they can do about the programming model though.

Does this make you drool? :p

We may be obsolete soon. If the SETI lab had one or two of these in the server closet they could probably crunch all the WU's themselves without wasting all this bandwidth by sending the WU's to us.

Who wants to start the fund drive?

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Heck what are those 8 cards?

Any specs?

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The T1 Trust, PRR T1 Class 4-4-4-4 #5550, 1 of America's First HST's

Heck what are those 8 cards?

Any specs?

From what I gather 50 core x86 cards running at 1.8Ghz based on 40nm fabrication.

The promised release ones are meant to be 80 core based upon 22nm fabrication.

Heck what are those 8 cards?

Any specs?

From what I gather 50 core x86 cards running at 1.8Ghz based on 40nm fabrication.

The promised release ones are meant to be 80 core based upon 22nm fabrication.

Thinking about what a tesla card cost`s,
One thing is certain, they will put a big hole in anyone`s credit card.
and that setup must be on a PCIe expansion board, which cost a fair bit,
There is a heck of a lot of dollars worth in that photo.

Heck what are those 8 cards?

Any specs?

From what I gather 50 core x86 cards running at 1.8Ghz based on 40nm fabrication.

The promised release ones are meant to be 80 core based upon 22nm fabrication.

Thinking about what a tesla card cost`s,
One thing is certain, they will put a big hole in anyone`s credit card.
and that setup must be on a PCIe expansion board, which cost a fair bit,
There is a heck of a lot of dollars worth in that photo.

Oh yeah, that's sounds about right, the pic has unobtainium in It, I guess, for Me at least. But I have more important problems right now...

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The T1 Trust, PRR T1 Class 4-4-4-4 #5550, 1 of America's First HST's

Heck what are those 8 cards?

Any specs?

From what I gather 50 core x86 cards running at 1.8Ghz based on 40nm fabrication.

The promised release ones are meant to be 80 core based upon 22nm fabrication.

Thinking about what a tesla card cost`s,
One thing is certain, they will put a big hole in anyone`s credit card.
and that setup must be on a PCIe expansion board, which cost a fair bit,
There is a heck of a lot of dollars worth in that photo.

Oh yeah, that's sounds about right, the pic has unobtainium in It, I guess, for Me at least. But I have more important problems right now...

Looks like each one of those boars has an 8pin and a 6pin going to it. For at least 225w to each card, or 1800w of 12v goodness.

The next question is who makes that power configuration/chassis. Could be a custom Intel job for show, but it is a good setup for the massive GPU guys as well.

Edit: Here is the whole article where that image came from.
http://www.thinq.co.uk/2011/6/20/intel-pushes-hpc-space-knights-corner

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SETI@home classic workunits: 93,865 CPU time: 863,447 hours
Join the [url=http://tinyurl.com/8y46zvu]BP6/VP6 User Group[